Inheritance diagram for Stage:

[legend]

Public Member Functions
	Stage (const Stage &)=delete

	Stage (int stageno, bool egress_only)

	Stage (Stage &&)

int	adr_dist_delay (gress_t gress) const

int	cycles_contribute_to_latency (gress_t gress)

template<class REGS>
void	fixup_regs (REGS &regs)

template<class REGS>
void	gen_configuration_cache (REGS &regs, json::vector &cfg_cache)

template<>
void	gen_configuration_cache (Target::JBay::mau_regs &regs, json::vector &cfg_cache)

template<>
void	gen_configuration_cache (Target::Tofino::mau_regs &regs, json::vector &cfg_cache)

template<class REGS>
void	gen_configuration_cache_common (REGS &regs, json::vector &cfg_cache)

template<class REGS>
void	gen_gfm_json_info (REGS &regs, std::ostream &out)

template<class REGS>
void	gen_mau_stage_characteristics (REGS &regs, json::vector &stg_characteristics)

template<class REGS>
void	gen_mau_stage_extension (REGS &regs, json::map &extend)

template<>
void	gen_mau_stage_extension (Target::Tofino::mau_regs &regs, json::map &extend)

bitvec	imem_use_all () const

void	log_hashes (std::ofstream &out) const

int	meter_alu_delay (gress_t gress, bool uses_divmod) const

template<class TARGET>
void	output (json::map &ctxt_json, bool egress_only=false)

int	pipelength (gress_t gress) const

int	pred_cycle (gress_t gress) const

int	tcam_delay (gress_t gress) const

void	verify_have_mpr (std::string key, int line_number)

template<class TARGET>
void	write_common_regs (typename TARGET::mau_regs &regs)

template<class REGS>
void	write_regs (REGS &regs, bool egress_only)

template<>
void	write_regs (Target::JBay::mau_regs &regs, bool)

template<>
void	write_regs (Target::Tofino::mau_regs &regs, bool)

template<class REGS>
void	write_teop_regs (REGS &regs)

Static Public Member Functions
static unsigned	end_of_pipe ()

static int	first_table (gress_t gress)

static Stage *	stage (gress_t gress, int stageno)

Static Public Attributes
static unsigned char	action_bus_slot_map [ACTION_DATA_BUS_BYTES]

static unsigned char	action_bus_slot_size [ACTION_DATA_BUS_SLOTS]

Static Public Attributes inherited from Stage_data
static std::map< int, std::pair< bool, int > >	teop

Additional Inherited Members
Public Types inherited from Stage_data
enum	{ USE_TCAM = 1 , USE_STATEFUL = 4 , USE_METER = 8 , USE_METER_LPF_RED = 16 , USE_SELECTOR = 32 , USE_WIDE_SELECTOR = 64 , USE_STATEFUL_DIVIDE = 128 }

enum	{ NONE = 0 , CONCURRENT = 1 , ACTION_DEP = 2 , MATCH_DEP = 3 }

Public Attributes inherited from Stage_data
BFN::Alloc1D< Table *, ACTION_DATA_BUS_SLOTS >	action_bus_use

bitvec	action_bus_use_bit_mask

BFN::Alloc1D< Table *, LOGICAL_SRAM_ROWS >	action_data_use

bitvec	action_set [3]

BFN::Alloc1Dbase< ActionTable * >	action_unit_use

bitvec	action_use [3]

std::set< Stage ** >	all_refs

BFN::Alloc1Dbase< Synth2Port * >	dp_unit_use

ErrorMode	error_mode [2]

int	group_table_use [2]

BFN::Alloc2D< GatewayTable *, SRAM_ROWS, 2 >	gw_payload_use

BFN::Alloc2D< GatewayTable *, SRAM_ROWS, 2 >	gw_unit_use

BFN::Alloc1D< std::vector< HashDistribution * >, 6 >	hash_dist_use

BFN::Alloc1Dbase< std::vector< InputXbar * > >	hash_group_use

BFN::Alloc1Dbase< std::vector< InputXbar * > >	hash_table_use

BFN::Alloc1D< Table *, IDLETIME_BUSSES >	idletime_bus_use

BFN::Alloc2D< Table::Actions::Action *, 2, ACTION_IMEM_ADDR_MAX >	imem_addr_use

bitvec	imem_use [ACTION_IMEM_SLOTS]

ordered_map< InputXbar::Group, std::vector< InputXbar * > >	ixbar_use

BFN::Alloc1Dbase< Table * >	local_tind_use

BFN::Alloc1D< Table *, LOGICAL_TABLES_PER_STAGE >	logical_id_use

unsigned	long_branch_terminate = 0

unsigned	long_branch_thread [3] = {0}

BFN::Alloc1D< Table::NextTables *, MAX_LONGBRANCH_TAGS >	long_branch_use

BFN::Alloc2D< Table *, SRAM_ROWS, MAPRAM_UNITS_PER_ROW >	mapram_use

BFN::Alloc2D< Table *, SRAM_ROWS, 2 >	match_result_bus_use

bitvec	match_use [3]

BFN::Alloc1D< Table *, LOGICAL_SRAM_ROWS >	meter_bus_use

int	mpr_always_run = 0

int	mpr_bus_dep_glob_exec [3] = {0}

int	mpr_bus_dep_long_branch [3] = {0}

BFN::Alloc1D< int, LOGICAL_TABLES_PER_STAGE >	mpr_glob_exec_lut

BFN::Alloc1D< int, MAX_LONGBRANCH_TAGS >	mpr_long_brch_lut

BFN::Alloc2D< int, 3, LOGICAL_TABLES_PER_STAGE >	mpr_next_table_lut

int	mpr_stage_id [3] = {0}

BFN::Alloc1D< Table *, LOGICAL_SRAM_ROWS >	overflow_bus_use

int	pass1_logical_id = -1

int	pass1_tcam_id = -1

BFN::Alloc1D< Table *, PHYSICAL_TABLES_PER_STAGE >	physical_id_use

BFN::Alloc1D< Table *, LOGICAL_SRAM_ROWS >	selector_adr_bus_use

BFN::Alloc2D< Table *, SRAM_ROWS, 2 >	sram_search_bus_use

BFN::Alloc2Dbase< Table * >	sram_use

enum Stage_data:: { ... }	stage_dep [2]

int	stageno

BFN::Alloc1D< Table *, LOGICAL_SRAM_ROWS >	stats_bus_use

BFN::Alloc3Dbase< Table * >	stm_hbus_use

int	table_use [2]

std::vector< Table * >	tables

BFN::Alloc2D< std::pair< Table *, int >, TCAM_ROWS, 2 >	tcam_byte_group_use

BFN::Alloc1D< Table *, TCAM_TABLES_PER_STAGE >	tcam_id_use

BFN::Alloc2D< Table *, SRAM_ROWS, 2 >	tcam_indirect_bus_use

BFN::Alloc1D< Table *, TCAM_XBAR_INPUT_BYTES >	tcam_ixbar_input

BFN::Alloc2Dbase< Table * >	tcam_match_bus_use

BFN::Alloc2Dbase< Table * >	tcam_use

Protected Member Functions inherited from Stage_data
	Stage_data (const Stage_data &)=delete

	Stage_data (int stage, bool egress_only)

	Stage_data (Stage_data &&)=default

Member Function Documentation

◆ gen_configuration_cache()

template<>

void Stage::gen_configuration_cache	(	Target::JBay::mau_regs &	regs,
		json::vector &	cfg_cache )

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

SPDX-License-Identifier: Apache-2.0

◆ write_regs()

template<>

void Stage::write_regs	(	Target::Tofino::mau_regs &	regs,
		bool	)

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

SPDX-License-Identifier: Apache-2.0

Public Member Functions

Static Public Member Functions

Static Public Attributes

Additional Inherited Members

Member Function Documentation

◆ gen_configuration_cache()

◆ write_regs()